VAMPIRE	eBACS: ECRYPT Benchmarking of Cryptographic Systems	ECRYPT II

Architecture notes

Often different CPUs have the same "microarchitecture". The number of cycles taken by an instruction within a CPU core depends only on the instruction and microarchitecture. Cycles can still vary because of, e.g., different time to access memory outside the CPU core.

There is not necessarily agreement on which CPU changes constitute microarchitecture changes. For example, eBACS distinguishes "Haswell" and "Haswell+AES" microarchitectures, whereas many sources treat these as a single "Haswell" microarchitecture.

If a CPU core has the CPU ID and CPU manufacturer shown in the following table then eBACS classifies the core as the microarchitecture shown in the table. Sometimes the "Manufacturer" column includes additional text after the manufacturer name, in which case eBACS asks for the CPU name to begin with that text: for example, CPU ID 306c3 is classified as "Haswell" if the CPU is an "Intel Core i3", but is classified as "Haswell+AES" if the CPU is an "Intel Core i5".

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