Test results for amd64, alder2,little, crypto_hash/simd512

[Page version: 20260126 18:15:49]

Compiler output

optimized.c: optimized.c:437:9: warning: unused variable 'j' [-Wunused-variable]
optimized.c:   int i,j;
optimized.c:         ^
optimized.c: 1 warning generated.

Compiler output

optimized.c: optimized.c: In function 'SIMD_Compress':
optimized.c: optimized.c:437:9: warning: unused variable 'j' [-Wunused-variable]
optimized.c:   437 |   int i,j;
optimized.c:       |         ^

Compiler output

reference.c: reference.c:69:82: warning: expression result unused [-Wunused-value]
reference.c:     state->A[j] = state->D[j] + w[j] + F(state->A[j], state->B[j], state->C[j]), s;
reference.c:                                                                                  ^
reference.c: 1 warning generated.

Compiler output

vector.c: vector.c:73:9: warning: 'X' macro redefined [-Wmacro-redefined]
vector.c: #define X(i) X##i
vector.c:         ^
vector.c: vector.c:68:9: note: previous definition is here
vector.c: #define X(i) A[i]
vector.c:         ^
vector.c: vector.c:129:3: error: use of unknown builtin '__builtin_ia32_pcmpgtw128' [-Wimplicit-function-declaration]
vector.c:   DO_REDUCE_FULL_S(0);
vector.c:   ^
vector.c: vector.c:56:12: note: expanded from macro 'DO_REDUCE_FULL_S'
vector.c:     X(i) = EXTRA_REDUCE_S(X(i));                \
vector.c:            ^
vector.c: vector.c:42:32: note: expanded from macro 'EXTRA_REDUCE_S'
vector.c:   v16_sub(x, v16_and(V257.v16, v16_cmp(x, V128.v16)))
vector.c:                                ^
vector.c: ./vector.h:92:22: note: expanded from macro 'v16_cmp'
vector.c: #define v16_cmp      __builtin_ia32_pcmpgtw128
vector.c:                      ^
vector.c: vector.c:129:3: error: cannot convert between scalar type 'int' and vector type 'v16' (aka 'v8hi') as implicit conversion would cause truncation
vector.c: vector.c:56:12: note: expanded from macro 'DO_REDUCE_FULL_S'
vector.c:     X(i) = EXTRA_REDUCE_S(X(i));                \
vector.c:            ^
vector.c: vector.c:42:14: note: expanded from macro 'EXTRA_REDUCE_S'
vector.c:   v16_sub(x, v16_and(V257.v16, v16_cmp(x, V128.v16)))
vector.c:              ^
vector.c: ...

Compiler output

vector.c: vector.c: In function 'fft64':
vector.c: vector.c:73: warning: "X" redefined
vector.c:    73 | #define X(i) X##i
vector.c:       |
vector.c: vector.c:68: note: this is the location of the previous definition
vector.c:    68 | #define X(i) A[i]
vector.c:       |
vector.c: vector.c: In function 'fft128_msg_final':
vector.c: vector.c:326:7: warning: unused variable 'i' [-Wunused-variable]
vector.c:   326 |   int i;
vector.c:       |       ^
vector.c: vector.c: In function 'rounds512':
vector.c: vector.c:796: warning: "STEP_1" redefined
vector.c:   796 | #define STEP_1(a,b,c,d,w,fun,r,s,z)             \
vector.c:       |
vector.c: vector.c:542: note: this is the location of the previous definition
vector.c:   542 | #define STEP_1(a,b,c,d,w,fun,r,s,z)                             \
vector.c:       |
vector.c: vector.c:805: warning: "STEP_2" redefined
vector.c:   805 | #define STEP_2(a,b,c,d,w,fun,r,s)              \
vector.c:       |
vector.c: vector.c:566: note: this is the location of the previous definition
vector.c:   566 | #define STEP_2(a,b,c,d,w,fun,r,s)                               \
vector.c:       |
vector.c: vector.c:808: warning: "STEP" redefined
vector.c: ...

Namespace violations

nist.o Final T
nist.o Hash T
nist.o IV_224 D
nist.o IV_256 D
nist.o IV_384 D
nist.o IV_512 D
nist.o IncreaseCounter T
nist.o Init T
nist.o InitIV T
nist.o Update T
optimized.o FFT_128_full T
optimized.o FFT_128_halfzero T
optimized.o FFT_256_halfzero T
optimized.o FFT_64 T
optimized.o RequiredAlignment T
optimized.o Round4 T
optimized.o Round8 T
optimized.o SIMD_Compress T
optimized.o SupportedLength T
optimized.o VERSION T
optimized.o fft128_natural T
optimized.o fft256_natural T
optimized.o p8_xor R
optimized.o revbin T

Namespace violations

nist.o Final T
nist.o Hash T
nist.o IV_224 D
nist.o IV_256 D
nist.o IV_384 D
nist.o IV_512 D
nist.o IncreaseCounter T
nist.o Init T
nist.o InitIV T
nist.o Update T
reference.o IF T
reference.o MAJ T
reference.o P R
reference.o RequiredAlignment T
reference.o Round T
reference.o SIMD_Compress T
reference.o Step T
reference.o SupportedLength T
reference.o VERSION T
reference.o message_expansion T
reference.o p4 R
reference.o p8 R

Namespace violations

simd.o sph_simd224 T
simd.o sph_simd224_addbits_and_close T
simd.o sph_simd224_close T
simd.o sph_simd224_init T
simd.o sph_simd256 T
simd.o sph_simd256_addbits_and_close T
simd.o sph_simd256_close T
simd.o sph_simd256_init T
simd.o sph_simd384 T
simd.o sph_simd384_addbits_and_close T
simd.o sph_simd384_close T
simd.o sph_simd384_init T
simd.o sph_simd512 T
simd.o sph_simd512_addbits_and_close T
simd.o sph_simd512_close T
simd.o sph_simd512_init T

Namespace violations

nist.o Final T
nist.o Hash T
nist.o IV_224 D
nist.o IV_256 D
nist.o IV_384 D
nist.o IV_512 D
nist.o IncreaseCounter T
nist.o Init T
nist.o InitIV T
nist.o Update T
vector.o RequiredAlignment T
vector.o SIMD_Compress T
vector.o SupportedLength T
vector.o VERSION T
vector.o fft128_msg T
vector.o fft128_msg_final T
vector.o fft128_natural T
vector.o fft256_msg T
vector.o rounds T
vector.o rounds512 T