Implementation notes: riscv64, riscvunleashed000, crypto_hash/mcssha5

Computer: riscvunleashed000
Microarchitecture: riscv64; U54 (sifive,u54-mc)
Architecture: riscv64
CPU ID: unknown CPU ID
SUPERCOP version: 20240107
Operation: crypto_hash
Primitive: mcssha5
TimeObject sizeTest sizeImplementationCompilerBenchmark dateSUPERCOP version
1779934678 0 013094 776 728T:refgcc_-mcpu=sifive-u54_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024011320231222
1823384022 0 010814 776 728T:refgcc_-mcpu=sifive-u54_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024011320231222
1877713934 0 010182 760 728T:refgcc_-mcpu=sifive-u54_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024011320231222
1985735032 0 013665 776 728T:refclang_-march=rv64imafdc_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024011320231222
1985755032 0 013665 776 728T:refclang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024011320231222
1989264488 0 012709 776 728T:refclang_-march=rv64imafdc_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024011320231222
1989364488 0 012709 776 728T:refclang_-march=rv64imafdc_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024011320231222
1989483848 0 010395 768 721T:refclang_-march=rv64imafdc_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE2024011320231222
2333653974 0 010613 768 728T:refgcc_-mcpu=sifive-u54_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE2024011320231222