Implementation notes: armeabi, berry2, crypto_hash/asconhashabi32v12

Computer: berry2
Microarchitecture: armeabi; Cortex-A7 (410fc075)
Architecture: armeabi
CPU ID: unknown CPU ID
SUPERCOP version: 20240425
Operation: crypto_hash
Primitive: asconhashabi32v12

Time	Object size	Test size	Implementation	Compiler	Benchmark date	SUPERCOP version
90744	4976 0 0	14684 384 744	`bi32_armv6`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240430	20240425
90748	4976 0 0	12803 380 744	`bi32_armv6`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240430	20240425
91312	5072 0 0	24341 384 760	`bi32_armv6`	`clang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240430	20240425
91522	4964 0 0	12231 372 744	`bi32_armv6`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240430	20240425
94485	5200 0 0	13035 380 744	`bi32_armv6`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240430	20240425
118614	7948 0 0	17668 384 744	`ref`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240430	20240425
122376	6852 0 0	14671 380 744	`bi32`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240430	20240425
122420	6852 0 0	16552 384 744	`bi32`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240430	20240425
128690	6900 0 0	14159 372 744	`bi32`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240430	20240425
134062	7908 0 0	15751 380 744	`ref`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240430	20240425
136574	7916 0 0	15767 380 744	`ref`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240430	20240425
139016	7324 0 0	26587 384 760	`bi32`	`clang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240430	20240425
140126	2204 0 0	11936 388 744	`bi32_lowreg`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240430	20240425
140136	2168 0 0	10019 384 744	`bi32_lowreg`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240430	20240425
140874	948 0 0	10680 388 744	`bi32_lowsize`	`gcc_-march=native_-mtune=native_-O3_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240430	20240425
140904	948 0 0	8799 384 744	`bi32_lowsize`	`gcc_-march=native_-mtune=native_-O2_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240430	20240425
149504	7116 0 0	14943 380 744	`bi32`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240430	20240425
154818	940 0 0	8231 376 744	`bi32_lowsize`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240430	20240425
161596	1892 0 0	9183 376 744	`bi32_lowreg`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240430	20240425
180028	1176 0 0	9035 384 744	`bi32_lowsize`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240430	20240425
182906	2252 0 0	10111 384 744	`bi32_lowreg`	`gcc_-march=native_-mtune=native_-O_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240430	20240425
190072	2336 0 0	21622 388 760	`bi32_lowreg`	`clang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240430	20240425
194514	1168 0 0	8448 372 744	`ref`	`gcc_-march=native_-mtune=native_-Os_-fomit-frame-pointer_-fwrapv_-fPIC_-fPIE`	20240430	20240425
196696	2320 0 0	21614 384 760	`ref`	`clang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240430	20240425
207356	1156 0 0	20459 388 760	`bi32_lowsize`	`clang_-mcpu=native_-O3_-fomit-frame-pointer_-fwrapv_-Qunused-arguments_-fPIC_-fPIE`	20240430	20240425

Compiler output

Implementation: bi32_armv6m
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

hash.c: In file included from hash.c:4:
hash.c: In file included from ./permutations.h:11:
hash.c: ./round.h:14:7: error: couldn't allocate output register for constraint 'h'
hash.c: "@.syntax_unified\n\t"
hash.c: ^
hash.c: ./round.h:14:7: error: couldn't allocate output register for constraint 'h'
hash.c: ./round.h:14:7: error: couldn't allocate output register for constraint 'h'
hash.c: ./round.h:14:7: error: couldn't allocate output register for constraint 'h'
hash.c: ./round.h:14:7: error: couldn't allocate output register for constraint 'h'
hash.c: 5 errors generated.

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32_armv6m

Compiler output

Implementation: bi32_armv6m
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE

hash.c: In file included from permutations.h:11,
hash.c: from hash.c:4:
hash.c: hash.c: In function 'crypto_hash_asconhashabi32v12_bi32_armv6m_constbranchindex':
hash.c: round.h:13:3: error: impossible constraint in 'asm'
hash.c: __asm__ __volatile__(
hash.c: ^~~~~~~
hash.c: round.h:13:3: error: impossible constraint in 'asm'
hash.c: __asm__ __volatile__(
hash.c: ^~~~~~~
hash.c: round.h:13:3: error: impossible constraint in 'asm'
hash.c: __asm__ __volatile__(
hash.c: ^~~~~~~

Number of similar (compiler,implementation) pairs: 4, namely:

Compiler	Implementations
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_armv6m
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_armv6m
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_armv6m
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_armv6m

Compiler output

Implementation: bi32_armv7m
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

hash.c: In file included from hash.c:4:
hash.c: ./permutations.h:58:3: error: instruction requires: thumb2
hash.c: ROUND5(x0, x1, x2, x3, x4, RC4);
hash.c: ^
hash.c: ./round.h:159:41: note: expanded from macro 'ROUND5'
hash.c: "eor %[tmp2], %[x3_l], %[x4_l]\n\t" \
hash.c: ^
hash.c: <inline asm>:5:2: note: instantiated into assembly here
hash.c: orn r5, r9, r5
hash.c: ^
hash.c: In file included from hash.c:4:
hash.c: ./permutations.h:58:3: error: instruction requires: thumb2
hash.c: ROUND5(x0, x1, x2, x3, x4, RC4);
hash.c: ^
hash.c: ./round.h:175:41: note: expanded from macro 'ROUND5'
hash.c: "eor %[tmp2], %[x3_h], %[x4_h]\n\t" \
hash.c: ^
hash.c: <inline asm>:21:2: note: instantiated into assembly here
hash.c: orn r11, lr, r11
hash.c: ^
hash.c: In file included from hash.c:4:
hash.c: ./permutations.h:59:3: error: instruction requires: thumb2
hash.c: ROUND5(x2, x3, x4, x0, x1, RC5);
hash.c: ^
hash.c: ./round.h:159:41: note: expanded from macro 'ROUND5'
hash.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32_armv7m

Compiler output

Implementation: bi32_armv7m
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE

hash.c: /tmp/ccHubThp.s: Assembler messages:
hash.c: /tmp/ccHubThp.s:82: Error: selected processor does not support `orn r0,lr,r0' in ARM mode
hash.c: /tmp/ccHubThp.s:98: Error: selected processor does not support `orn r1,ip,r1' in ARM mode
hash.c: /tmp/ccHubThp.s:137: Error: selected processor does not support `orn r7,r2,r7' in ARM mode
hash.c: /tmp/ccHubThp.s:153: Error: selected processor does not support `orn r6,r3,r6' in ARM mode
hash.c: /tmp/ccHubThp.s:192: Error: selected processor does not support `orn lr,r5,lr' in ARM mode
hash.c: /tmp/ccHubThp.s:208: Error: selected processor does not support `orn ip,r4,ip' in ARM mode
hash.c: /tmp/ccHubThp.s:247: Error: selected processor does not support `orn r2,r0,r2' in ARM mode
hash.c: /tmp/ccHubThp.s:263: Error: selected processor does not support `orn r3,r1,r3' in ARM mode
hash.c: /tmp/ccHubThp.s:302: Error: selected processor does not support `orn r5,r7,r5' in ARM mode
hash.c: /tmp/ccHubThp.s:318: Error: selected processor does not support `orn r4,r6,r4' in ARM mode
hash.c: /tmp/ccHubThp.s:356: Error: selected processor does not support `orn r9,r0,r2' in ARM mode
hash.c: /tmp/ccHubThp.s:360: Error: selected processor does not support `orn r10,lr,r0' in ARM mode
hash.c: /tmp/ccHubThp.s:374: Error: selected processor does not support `orn r9,r1,r3' in ARM mode
hash.c: /tmp/ccHubThp.s:377: Error: selected processor does not support `orn r10,ip,r1' in ARM mode
hash.c: /tmp/ccHubThp.s:413: Error: selected processor does not support `orn r9,r0,r2' in ARM mode
hash.c: /tmp/ccHubThp.s:417: Error: selected processor does not support `orn r10,lr,r0' in ARM mode
hash.c: /tmp/ccHubThp.s:431: Error: selected processor does not support `orn r9,r1,r3' in ARM mode
hash.c: /tmp/ccHubThp.s:434: Error: selected processor does not support `orn r10,ip,r1' in ARM mode
hash.c: /tmp/ccHubThp.s:470: Error: selected processor does not support `orn r9,r0,r2' in ARM mode
hash.c: /tmp/ccHubThp.s:474: Error: selected processor does not support `orn r10,lr,r0' in ARM mode
hash.c: /tmp/ccHubThp.s:488: Error: selected processor does not support `orn r9,r1,r3' in ARM mode
hash.c: /tmp/ccHubThp.s:491: Error: selected processor does not support `orn r10,ip,r1' in ARM mode
hash.c: /tmp/ccHubThp.s:600: Error: selected processor does not support `orn r0,lr,r0' in ARM mode
hash.c: /tmp/ccHubThp.s:616: Error: selected processor does not support `orn r1,ip,r1' in ARM mode
hash.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_armv7m

Compiler output

Implementation: bi32_armv7m
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE

hash.c: /tmp/ccpm919d.s: Assembler messages:
hash.c: /tmp/ccpm919d.s:82: Error: selected processor does not support `orn r0,lr,r0' in ARM mode
hash.c: /tmp/ccpm919d.s:98: Error: selected processor does not support `orn r1,ip,r1' in ARM mode
hash.c: /tmp/ccpm919d.s:137: Error: selected processor does not support `orn r7,r2,r7' in ARM mode
hash.c: /tmp/ccpm919d.s:153: Error: selected processor does not support `orn r6,r3,r6' in ARM mode
hash.c: /tmp/ccpm919d.s:192: Error: selected processor does not support `orn lr,r5,lr' in ARM mode
hash.c: /tmp/ccpm919d.s:208: Error: selected processor does not support `orn ip,r4,ip' in ARM mode
hash.c: /tmp/ccpm919d.s:247: Error: selected processor does not support `orn r2,r0,r2' in ARM mode
hash.c: /tmp/ccpm919d.s:263: Error: selected processor does not support `orn r3,r1,r3' in ARM mode
hash.c: /tmp/ccpm919d.s:302: Error: selected processor does not support `orn r5,r7,r5' in ARM mode
hash.c: /tmp/ccpm919d.s:318: Error: selected processor does not support `orn r4,r6,r4' in ARM mode
hash.c: /tmp/ccpm919d.s:356: Error: selected processor does not support `orn r9,r0,r2' in ARM mode
hash.c: /tmp/ccpm919d.s:360: Error: selected processor does not support `orn r10,lr,r0' in ARM mode
hash.c: /tmp/ccpm919d.s:374: Error: selected processor does not support `orn r9,r1,r3' in ARM mode
hash.c: /tmp/ccpm919d.s:377: Error: selected processor does not support `orn r10,ip,r1' in ARM mode
hash.c: /tmp/ccpm919d.s:413: Error: selected processor does not support `orn r9,r0,r2' in ARM mode
hash.c: /tmp/ccpm919d.s:417: Error: selected processor does not support `orn r10,lr,r0' in ARM mode
hash.c: /tmp/ccpm919d.s:431: Error: selected processor does not support `orn r9,r1,r3' in ARM mode
hash.c: /tmp/ccpm919d.s:434: Error: selected processor does not support `orn r10,ip,r1' in ARM mode
hash.c: /tmp/ccpm919d.s:470: Error: selected processor does not support `orn r9,r0,r2' in ARM mode
hash.c: /tmp/ccpm919d.s:474: Error: selected processor does not support `orn r10,lr,r0' in ARM mode
hash.c: /tmp/ccpm919d.s:488: Error: selected processor does not support `orn r9,r1,r3' in ARM mode
hash.c: /tmp/ccpm919d.s:491: Error: selected processor does not support `orn r10,ip,r1' in ARM mode
hash.c: /tmp/ccpm919d.s:600: Error: selected processor does not support `orn r0,lr,r0' in ARM mode
hash.c: /tmp/ccpm919d.s:616: Error: selected processor does not support `orn r1,ip,r1' in ARM mode
hash.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_armv7m

Compiler output

Implementation: bi32_armv7m
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE

hash.c: /tmp/cc5eSuGl.s: Assembler messages:
hash.c: /tmp/cc5eSuGl.s:93: Error: selected processor does not support `orn r0,lr,r0' in ARM mode
hash.c: /tmp/cc5eSuGl.s:109: Error: selected processor does not support `orn r1,ip,r1' in ARM mode
hash.c: /tmp/cc5eSuGl.s:148: Error: selected processor does not support `orn r8,r2,r8' in ARM mode
hash.c: /tmp/cc5eSuGl.s:164: Error: selected processor does not support `orn r6,r3,r6' in ARM mode
hash.c: /tmp/cc5eSuGl.s:203: Error: selected processor does not support `orn lr,r5,lr' in ARM mode
hash.c: /tmp/cc5eSuGl.s:219: Error: selected processor does not support `orn ip,r4,ip' in ARM mode
hash.c: /tmp/cc5eSuGl.s:258: Error: selected processor does not support `orn r2,r0,r2' in ARM mode
hash.c: /tmp/cc5eSuGl.s:274: Error: selected processor does not support `orn r3,r1,r3' in ARM mode
hash.c: /tmp/cc5eSuGl.s:313: Error: selected processor does not support `orn r5,r8,r5' in ARM mode
hash.c: /tmp/cc5eSuGl.s:329: Error: selected processor does not support `orn r4,r6,r4' in ARM mode
hash.c: /tmp/cc5eSuGl.s:367: Error: selected processor does not support `orn r9,r0,r2' in ARM mode
hash.c: /tmp/cc5eSuGl.s:371: Error: selected processor does not support `orn r10,lr,r0' in ARM mode
hash.c: /tmp/cc5eSuGl.s:385: Error: selected processor does not support `orn r9,r1,r3' in ARM mode
hash.c: /tmp/cc5eSuGl.s:388: Error: selected processor does not support `orn r10,ip,r1' in ARM mode
hash.c: /tmp/cc5eSuGl.s:424: Error: selected processor does not support `orn r9,r0,r2' in ARM mode
hash.c: /tmp/cc5eSuGl.s:428: Error: selected processor does not support `orn r10,lr,r0' in ARM mode
hash.c: /tmp/cc5eSuGl.s:442: Error: selected processor does not support `orn r9,r1,r3' in ARM mode
hash.c: /tmp/cc5eSuGl.s:445: Error: selected processor does not support `orn r10,ip,r1' in ARM mode
hash.c: /tmp/cc5eSuGl.s:481: Error: selected processor does not support `orn r9,r0,r2' in ARM mode
hash.c: /tmp/cc5eSuGl.s:485: Error: selected processor does not support `orn r10,lr,r0' in ARM mode
hash.c: /tmp/cc5eSuGl.s:499: Error: selected processor does not support `orn r9,r1,r3' in ARM mode
hash.c: /tmp/cc5eSuGl.s:502: Error: selected processor does not support `orn r10,ip,r1' in ARM mode
hash.c: /tmp/cc5eSuGl.s:625: Error: selected processor does not support `orn r0,lr,r0' in ARM mode
hash.c: /tmp/cc5eSuGl.s:641: Error: selected processor does not support `orn r1,ip,r1' in ARM mode
hash.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_armv7m

Compiler output

Implementation: bi32_armv7m
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE

hash.c: /tmp/cckmx9JH.s: Assembler messages:
hash.c: /tmp/cckmx9JH.s:117: Error: selected processor does not support `orn lr,r4,lr' in ARM mode
hash.c: /tmp/cckmx9JH.s:133: Error: selected processor does not support `orn ip,r2,ip' in ARM mode
hash.c: /tmp/cckmx9JH.s:172: Error: selected processor does not support `orn r8,fp,r8' in ARM mode
hash.c: /tmp/cckmx9JH.s:188: Error: selected processor does not support `orn r7,r3,r7' in ARM mode
hash.c: /tmp/cckmx9JH.s:227: Error: selected processor does not support `orn r4,r6,r4' in ARM mode
hash.c: /tmp/cckmx9JH.s:243: Error: selected processor does not support `orn r2,r5,r2' in ARM mode
hash.c: /tmp/cckmx9JH.s:282: Error: selected processor does not support `orn fp,lr,fp' in ARM mode
hash.c: /tmp/cckmx9JH.s:298: Error: selected processor does not support `orn r3,ip,r3' in ARM mode
hash.c: /tmp/cckmx9JH.s:337: Error: selected processor does not support `orn r6,r8,r6' in ARM mode
hash.c: /tmp/cckmx9JH.s:353: Error: selected processor does not support `orn r5,r7,r5' in ARM mode
hash.c: /tmp/cckmx9JH.s:392: Error: selected processor does not support `orn lr,r4,lr' in ARM mode
hash.c: /tmp/cckmx9JH.s:408: Error: selected processor does not support `orn ip,r2,ip' in ARM mode
hash.c: /tmp/cckmx9JH.s:447: Error: selected processor does not support `orn r8,fp,r8' in ARM mode
hash.c: /tmp/cckmx9JH.s:463: Error: selected processor does not support `orn r7,r3,r7' in ARM mode
hash.c: /tmp/cckmx9JH.s:502: Error: selected processor does not support `orn r4,r6,r4' in ARM mode
hash.c: /tmp/cckmx9JH.s:518: Error: selected processor does not support `orn r2,r5,r2' in ARM mode
hash.c: /tmp/cckmx9JH.s:557: Error: selected processor does not support `orn fp,lr,fp' in ARM mode
hash.c: /tmp/cckmx9JH.s:573: Error: selected processor does not support `orn r3,ip,r3' in ARM mode
hash.c: /tmp/cckmx9JH.s:612: Error: selected processor does not support `orn r6,r8,r6' in ARM mode
hash.c: /tmp/cckmx9JH.s:628: Error: selected processor does not support `orn r5,r7,r5' in ARM mode
hash.c: /tmp/cckmx9JH.s:666: Error: selected processor does not support `orn r1,lr,fp' in ARM mode
hash.c: /tmp/cckmx9JH.s:670: Error: selected processor does not support `orn r0,r4,lr' in ARM mode
hash.c: /tmp/cckmx9JH.s:684: Error: selected processor does not support `orn r1,ip,r3' in ARM mode
hash.c: /tmp/cckmx9JH.s:687: Error: selected processor does not support `orn r0,r2,ip' in ARM mode
hash.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_armv7m

Compiler output

Implementation: bi32_armv7m_small
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

permutations.c: In file included from permutations.c:1:
permutations.c: In file included from ./permutations.h:11:
permutations.c: ./round.h:18:39: error: instruction requires: thumb2
permutations.c: "eor %[x2_l], %[x2_l], %[x1_l]\n\t"
permutations.c: ^
permutations.c: <inline asm>:6:2: note: instantiated into assembly here
permutations.c: orn r2, r10, r12
permutations.c: ^
permutations.c: In file included from permutations.c:1:
permutations.c: In file included from ./permutations.h:11:
permutations.c: ./round.h:22:39: error: instruction requires: thumb2
permutations.c: "eor %[x0_l], %[x0_l], %[tmp1]\n\t"
permutations.c: ^
permutations.c: <inline asm>:10:2: note: instantiated into assembly here
permutations.c: orn r9, r7, r10
permutations.c: ^
permutations.c: In file included from permutations.c:1:
permutations.c: In file included from ./permutations.h:11:
permutations.c: ./round.h:37:39: error: instruction requires: thumb2
permutations.c: "eor %[x2_h], %[x2_h], %[x1_h]\n\t"
permutations.c: ^
permutations.c: <inline asm>:25:2: note: instantiated into assembly here
permutations.c: orn r2, r11, r0
permutations.c: ^
permutations.c: In file included from permutations.c:1:
permutations.c: ...

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32_armv7m_small

Compiler output

Implementation: bi32_armv7m_small
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE

permutations.c: /tmp/ccgwOeba.s: Assembler messages:
permutations.c: /tmp/ccgwOeba.s:56: Error: selected processor does not support `orn r1,r2,r9' in ARM mode
permutations.c: /tmp/ccgwOeba.s:60: Error: selected processor does not support `orn r0,lr,r2' in ARM mode
permutations.c: /tmp/ccgwOeba.s:75: Error: selected processor does not support `orn r1,r3,r8' in ARM mode
permutations.c: /tmp/ccgwOeba.s:78: Error: selected processor does not support `orn r0,ip,r3' in ARM mode

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_armv7m_small

Compiler output

Implementation: bi32_armv7m_small
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE

permutations.c: /tmp/cciCx3RI.s: Assembler messages:
permutations.c: /tmp/cciCx3RI.s:56: Error: selected processor does not support `orn r1,r2,r9' in ARM mode
permutations.c: /tmp/cciCx3RI.s:60: Error: selected processor does not support `orn r0,lr,r2' in ARM mode
permutations.c: /tmp/cciCx3RI.s:75: Error: selected processor does not support `orn r1,r3,r8' in ARM mode
permutations.c: /tmp/cciCx3RI.s:78: Error: selected processor does not support `orn r0,ip,r3' in ARM mode

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_armv7m_small

Compiler output

Implementation: bi32_armv7m_small
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE

permutations.c: /tmp/ccgjJ2WD.s: Assembler messages:
permutations.c: /tmp/ccgjJ2WD.s:56: Error: selected processor does not support `orn r0,ip,r10' in ARM mode
permutations.c: /tmp/ccgjJ2WD.s:60: Error: selected processor does not support `orn fp,r4,ip' in ARM mode
permutations.c: /tmp/ccgjJ2WD.s:75: Error: selected processor does not support `orn r0,r2,r9' in ARM mode
permutations.c: /tmp/ccgjJ2WD.s:78: Error: selected processor does not support `orn fp,lr,r2' in ARM mode

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_armv7m_small

Compiler output

Implementation: bi32_armv7m_small
Security model: constbranchindex
Compiler: gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE

permutations.c: /tmp/ccK9zBHn.s: Assembler messages:
permutations.c: /tmp/ccK9zBHn.s:55: Error: selected processor does not support `orn r0,ip,r10' in ARM mode
permutations.c: /tmp/ccK9zBHn.s:59: Error: selected processor does not support `orn fp,r4,ip' in ARM mode
permutations.c: /tmp/ccK9zBHn.s:74: Error: selected processor does not support `orn r0,r2,r9' in ARM mode
permutations.c: /tmp/ccK9zBHn.s:77: Error: selected processor does not support `orn fp,lr,r2' in ARM mode

Number of similar (compiler,implementation) pairs: 1, namely:

Compiler	Implementations
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_armv7m_small

Namespace violations

Implementation: bi32
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

constants.o constants R
permutations.o P12 T
permutations.o P8 T

Number of similar (compiler,implementation) pairs: 10, namely:

Compiler	Implementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32_armv6
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_armv6
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_armv6
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_armv6
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_armv6

Namespace violations

Implementation: bi32_lowreg
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

constants.o constants R
hash.o ascon_absorb T
hash.o ascon_inithash T
hash.o ascon_squeeze T

Number of similar (compiler,implementation) pairs: 5, namely:

Compiler	Implementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32_lowreg
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_lowreg
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_lowreg
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_lowreg
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_lowreg

Namespace violations

Implementation: bi32_lowsize
Security model: constbranchindex
Compiler: clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE

constants.o constants R
permutations.o P T

Number of similar (compiler,implementation) pairs: 5, namely:

Compiler	Implementations
clang -mcpu=native -O3 -fomit-frame-pointer -fwrapv -Qunused-arguments -fPIC -fPIE	bi32_lowsize
gcc -march=native -mtune=native -O2 -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_lowsize
gcc -march=native -mtune=native -O3 -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_lowsize
gcc -march=native -mtune=native -O -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_lowsize
gcc -march=native -mtune=native -Os -fomit-frame-pointer -fwrapv -fPIC -fPIE	bi32_lowsize