Test results for armeabi, bblack, crypto_aead/omdsha256k256n248tau256v1

[Page version: 20250923 20:25:05]

Measurements for armeabi, bblack, crypto_aead Test results for armeabi, bblack, crypto_aead Test results for crypto_aead/omdsha256k256n248tau256v1
Computer: bblack
Microarchitecture: armeabi; Cortex-A8 (413fc082)
Architecture: armeabi
CPU ID: unknown CPU ID
SUPERCOP version: 20250415
Operation: crypto_aead
Primitive: omdsha256k256n248tau256v1

Checksum failure


6147a2548a404a3fb9d831872af96b879aced65d45f14bf9b2a376237f1f5516

Number of similar (implementation,compiler) pairs: 9, namely:
ImplementationCompiler
T:refclang -march=native -O2 -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (4.2.1_Compatible_Clang_7.0.1_(tags/RELEASE_701/final))
T:refclang -march=native -O3 -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (4.2.1_Compatible_Clang_7.0.1_(tags/RELEASE_701/final))
T:refclang -march=native -O -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (4.2.1_Compatible_Clang_7.0.1_(tags/RELEASE_701/final))
T:refclang -march=native -Os -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (4.2.1_Compatible_Clang_7.0.1_(tags/RELEASE_701/final))
T:refclang -mcpu=native -O3 -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (4.2.1_Compatible_Clang_7.0.1_(tags/RELEASE_701/final))
T:refgcc -march=native -mtune=native -O2 -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (8.3.0)
T:refgcc -march=native -mtune=native -O3 -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (8.3.0)
T:refgcc -march=native -mtune=native -O -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (8.3.0)
T:refgcc -march=native -mtune=native -Os -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (8.3.0)

Compiler output


encrypt.c: <inline asm>:1:1: error: unknown directive
encrypt.c: .intel_syntax noprefix
encrypt.c: ^
encrypt.c: <inline asm>:3:12: error: invalid alignment value
encrypt.c:     .align 32
encrypt.c:            ^
encrypt.c: <inline asm>:5:6: error: invalid operand for instruction
encrypt.c: push rbx
encrypt.c:      ^
encrypt.c: <inline asm>:6:10: error: invalid operand for instruction
encrypt.c:     push rbp
encrypt.c:          ^
encrypt.c: <inline asm>:7:10: error: invalid operand for instruction
encrypt.c:     push r13
encrypt.c:          ^
encrypt.c: <inline asm>:8:10: error: invalid operand for instruction
encrypt.c:     push r14
encrypt.c:          ^
encrypt.c: <inline asm>:9:10: error: invalid operand for instruction
encrypt.c:     push r15
encrypt.c:          ^
encrypt.c: <inline asm>:10:9: error: operand must be a register in range [r0, r15]
encrypt.c:     sub rsp,32
encrypt.c:         ^
encrypt.c: <inline asm>:11:5: error: invalid instruction, did you mean: lsl, sel?
encrypt.c: ...

Number of similar (implementation,compiler) pairs: 8, namely:
ImplementationCompiler
T:avx1clang -march=native -O2 -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (4.2.1_Compatible_Clang_7.0.1_(tags/RELEASE_701/final))
T:avx1clang -march=native -O3 -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (4.2.1_Compatible_Clang_7.0.1_(tags/RELEASE_701/final))
T:avx1clang -march=native -O -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (4.2.1_Compatible_Clang_7.0.1_(tags/RELEASE_701/final))
T:avx1clang -march=native -Os -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (4.2.1_Compatible_Clang_7.0.1_(tags/RELEASE_701/final))
T:sse4clang -march=native -O2 -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (4.2.1_Compatible_Clang_7.0.1_(tags/RELEASE_701/final))
T:sse4clang -march=native -O3 -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (4.2.1_Compatible_Clang_7.0.1_(tags/RELEASE_701/final))
T:sse4clang -march=native -O -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (4.2.1_Compatible_Clang_7.0.1_(tags/RELEASE_701/final))
T:sse4clang -march=native -Os -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (4.2.1_Compatible_Clang_7.0.1_(tags/RELEASE_701/final))

Compiler output


encrypt.c: <inline asm>:1:1: error: unknown directive
encrypt.c: .intel_syntax noprefix
encrypt.c: ^
encrypt.c: <inline asm>:3:12: error: invalid alignment value
encrypt.c:     .align 32
encrypt.c:            ^
encrypt.c: <inline asm>:5:6: error: invalid operand for instruction
encrypt.c: push rbx
encrypt.c:      ^
encrypt.c: <inline asm>:6:10: error: invalid operand for instruction
encrypt.c:     push rbp
encrypt.c:          ^
encrypt.c: <inline asm>:7:10: error: invalid operand for instruction
encrypt.c:     push r13
encrypt.c:          ^
encrypt.c: <inline asm>:8:10: error: invalid operand for instruction
encrypt.c:     push r14
encrypt.c:          ^
encrypt.c: <inline asm>:9:10: error: invalid operand for instruction
encrypt.c:     push r15
encrypt.c:          ^
encrypt.c: <inline asm>:10:9: error: operand must be a register in range [r0, r15]
encrypt.c:     sub rsp,32
encrypt.c:         ^
encrypt.c: <inline asm>:11:5: error: invalid instruction, did you mean: lsl, sel, vqshl, vrshl, vshl, vshll?
encrypt.c: ...

Number of similar (implementation,compiler) pairs: 2, namely:
ImplementationCompiler
T:avx1clang -mcpu=native -O3 -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (4.2.1_Compatible_Clang_7.0.1_(tags/RELEASE_701/final))
T:sse4clang -mcpu=native -O3 -fwrapv -Qunused-arguments -fPIC -fPIE -gdwarf-4 -Wall (4.2.1_Compatible_Clang_7.0.1_(tags/RELEASE_701/final))

Compiler output


encrypt.c: /tmp/ccEewfyb.s: Assembler messages:
encrypt.c: /tmp/ccEewfyb.s:17: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/ccEewfyb.s:20: Warning: alignment too large: 31 assumed
encrypt.c: /tmp/ccEewfyb.s:23: Error: expression too complex -- `push rbx'
encrypt.c: /tmp/ccEewfyb.s:24: Error: expression too complex -- `push rbp'
encrypt.c: /tmp/ccEewfyb.s:25: Error: expression too complex -- `push r13'
encrypt.c: /tmp/ccEewfyb.s:26: Error: expression too complex -- `push r14'
encrypt.c: /tmp/ccEewfyb.s:27: Error: expression too complex -- `push r15'
encrypt.c: /tmp/ccEewfyb.s:28: Error: ARM register expected -- `sub rsp,32'
encrypt.c: /tmp/ccEewfyb.s:29: Error: bad instruction `shl rdx,6'
encrypt.c: /tmp/ccEewfyb.s:30: Error: bad instruction `jz done_hash'
encrypt.c: /tmp/ccEewfyb.s:31: Error: ARM register expected -- `add rdx,rdi'
encrypt.c: /tmp/ccEewfyb.s:32: Error: ARM register expected -- `mov [rsp+0],rdx'
encrypt.c: /tmp/ccEewfyb.s:33: Error: ARM register expected -- `mov eax,[4*0+rsi]'
encrypt.c: /tmp/ccEewfyb.s:34: Error: ARM register expected -- `mov ebx,[4*1+rsi]'
encrypt.c: /tmp/ccEewfyb.s:35: Error: ARM register expected -- `mov ecx,[4*2+rsi]'
encrypt.c: /tmp/ccEewfyb.s:36: Error: ARM register expected -- `mov r8d,[4*3+rsi]'
encrypt.c: /tmp/ccEewfyb.s:37: Error: ARM register expected -- `mov edx,[4*4+rsi]'
encrypt.c: /tmp/ccEewfyb.s:38: Error: ARM register expected -- `mov r9d,[4*5+rsi]'
encrypt.c: /tmp/ccEewfyb.s:39: Error: ARM register expected -- `mov r10d,[4*6+rsi]'
encrypt.c: /tmp/ccEewfyb.s:40: Error: ARM register expected -- `mov r11d,[4*7+rsi]'
encrypt.c: /tmp/ccEewfyb.s:41: Error: bad instruction `vmovdqa xmm13,XMMWORD PTR [PSHUFFLE_BYTE_FLIP_MASK+rip]'
encrypt.c: /tmp/ccEewfyb.s:42: Error: bad instruction `vmovdqa xmm10,XMMWORD PTR [_SHUF_00BA+rip]'
encrypt.c: /tmp/ccEewfyb.s:43: Error: bad instruction `vmovdqa xmm12,XMMWORD PTR [_SHUF_DC00+rip]'
encrypt.c: /tmp/ccEewfyb.s:45: Error: bad instruction `lea rbp,XMMWORD PTR [K256+rip]'
encrypt.c: ...

Number of similar (implementation,compiler) pairs: 1, namely:
ImplementationCompiler
T:avx1gcc -march=native -mtune=native -O2 -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (8.3.0)

Compiler output


encrypt.c: /tmp/ccyl0aTI.s: Assembler messages:
encrypt.c: /tmp/ccyl0aTI.s:17: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/ccyl0aTI.s:20: Warning: alignment too large: 31 assumed
encrypt.c: /tmp/ccyl0aTI.s:23: Error: expression too complex -- `push rbx'
encrypt.c: /tmp/ccyl0aTI.s:24: Error: expression too complex -- `push rbp'
encrypt.c: /tmp/ccyl0aTI.s:25: Error: expression too complex -- `push r13'
encrypt.c: /tmp/ccyl0aTI.s:26: Error: expression too complex -- `push r14'
encrypt.c: /tmp/ccyl0aTI.s:27: Error: expression too complex -- `push r15'
encrypt.c: /tmp/ccyl0aTI.s:28: Error: ARM register expected -- `sub rsp,32'
encrypt.c: /tmp/ccyl0aTI.s:29: Error: bad instruction `shl rdx,6'
encrypt.c: /tmp/ccyl0aTI.s:30: Error: bad instruction `jz done_hash'
encrypt.c: /tmp/ccyl0aTI.s:31: Error: ARM register expected -- `add rdx,rdi'
encrypt.c: /tmp/ccyl0aTI.s:32: Error: ARM register expected -- `mov [rsp+0],rdx'
encrypt.c: /tmp/ccyl0aTI.s:33: Error: ARM register expected -- `mov eax,[4*0+rsi]'
encrypt.c: /tmp/ccyl0aTI.s:34: Error: ARM register expected -- `mov ebx,[4*1+rsi]'
encrypt.c: /tmp/ccyl0aTI.s:35: Error: ARM register expected -- `mov ecx,[4*2+rsi]'
encrypt.c: /tmp/ccyl0aTI.s:36: Error: ARM register expected -- `mov r8d,[4*3+rsi]'
encrypt.c: /tmp/ccyl0aTI.s:37: Error: ARM register expected -- `mov edx,[4*4+rsi]'
encrypt.c: /tmp/ccyl0aTI.s:38: Error: ARM register expected -- `mov r9d,[4*5+rsi]'
encrypt.c: /tmp/ccyl0aTI.s:39: Error: ARM register expected -- `mov r10d,[4*6+rsi]'
encrypt.c: /tmp/ccyl0aTI.s:40: Error: ARM register expected -- `mov r11d,[4*7+rsi]'
encrypt.c: /tmp/ccyl0aTI.s:41: Error: bad instruction `vmovdqa xmm13,XMMWORD PTR [PSHUFFLE_BYTE_FLIP_MASK+rip]'
encrypt.c: /tmp/ccyl0aTI.s:42: Error: bad instruction `vmovdqa xmm10,XMMWORD PTR [_SHUF_00BA+rip]'
encrypt.c: /tmp/ccyl0aTI.s:43: Error: bad instruction `vmovdqa xmm12,XMMWORD PTR [_SHUF_DC00+rip]'
encrypt.c: /tmp/ccyl0aTI.s:45: Error: bad instruction `lea rbp,XMMWORD PTR [K256+rip]'
encrypt.c: ...

Number of similar (implementation,compiler) pairs: 1, namely:
ImplementationCompiler
T:avx1gcc -march=native -mtune=native -O3 -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (8.3.0)

Compiler output


encrypt.c: /tmp/ccVSjho2.s: Assembler messages:
encrypt.c: /tmp/ccVSjho2.s:17: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/ccVSjho2.s:20: Warning: alignment too large: 31 assumed
encrypt.c: /tmp/ccVSjho2.s:23: Error: expression too complex -- `push rbx'
encrypt.c: /tmp/ccVSjho2.s:24: Error: expression too complex -- `push rbp'
encrypt.c: /tmp/ccVSjho2.s:25: Error: expression too complex -- `push r13'
encrypt.c: /tmp/ccVSjho2.s:26: Error: expression too complex -- `push r14'
encrypt.c: /tmp/ccVSjho2.s:27: Error: expression too complex -- `push r15'
encrypt.c: /tmp/ccVSjho2.s:28: Error: ARM register expected -- `sub rsp,32'
encrypt.c: /tmp/ccVSjho2.s:29: Error: bad instruction `shl rdx,6'
encrypt.c: /tmp/ccVSjho2.s:30: Error: bad instruction `jz done_hash'
encrypt.c: /tmp/ccVSjho2.s:31: Error: ARM register expected -- `add rdx,rdi'
encrypt.c: /tmp/ccVSjho2.s:32: Error: ARM register expected -- `mov [rsp+0],rdx'
encrypt.c: /tmp/ccVSjho2.s:33: Error: ARM register expected -- `mov eax,[4*0+rsi]'
encrypt.c: /tmp/ccVSjho2.s:34: Error: ARM register expected -- `mov ebx,[4*1+rsi]'
encrypt.c: /tmp/ccVSjho2.s:35: Error: ARM register expected -- `mov ecx,[4*2+rsi]'
encrypt.c: /tmp/ccVSjho2.s:36: Error: ARM register expected -- `mov r8d,[4*3+rsi]'
encrypt.c: /tmp/ccVSjho2.s:37: Error: ARM register expected -- `mov edx,[4*4+rsi]'
encrypt.c: /tmp/ccVSjho2.s:38: Error: ARM register expected -- `mov r9d,[4*5+rsi]'
encrypt.c: /tmp/ccVSjho2.s:39: Error: ARM register expected -- `mov r10d,[4*6+rsi]'
encrypt.c: /tmp/ccVSjho2.s:40: Error: ARM register expected -- `mov r11d,[4*7+rsi]'
encrypt.c: /tmp/ccVSjho2.s:41: Error: bad instruction `vmovdqa xmm13,XMMWORD PTR [PSHUFFLE_BYTE_FLIP_MASK+rip]'
encrypt.c: /tmp/ccVSjho2.s:42: Error: bad instruction `vmovdqa xmm10,XMMWORD PTR [_SHUF_00BA+rip]'
encrypt.c: /tmp/ccVSjho2.s:43: Error: bad instruction `vmovdqa xmm12,XMMWORD PTR [_SHUF_DC00+rip]'
encrypt.c: /tmp/ccVSjho2.s:45: Error: bad instruction `lea rbp,XMMWORD PTR [K256+rip]'
encrypt.c: ...

Number of similar (implementation,compiler) pairs: 1, namely:
ImplementationCompiler
T:avx1gcc -march=native -mtune=native -O -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (8.3.0)

Compiler output


encrypt.c: /tmp/ccOrOLUr.s: Assembler messages:
encrypt.c: /tmp/ccOrOLUr.s:17: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/ccOrOLUr.s:20: Warning: alignment too large: 31 assumed
encrypt.c: /tmp/ccOrOLUr.s:23: Error: expression too complex -- `push rbx'
encrypt.c: /tmp/ccOrOLUr.s:24: Error: expression too complex -- `push rbp'
encrypt.c: /tmp/ccOrOLUr.s:25: Error: expression too complex -- `push r13'
encrypt.c: /tmp/ccOrOLUr.s:26: Error: expression too complex -- `push r14'
encrypt.c: /tmp/ccOrOLUr.s:27: Error: expression too complex -- `push r15'
encrypt.c: /tmp/ccOrOLUr.s:28: Error: ARM register expected -- `sub rsp,32'
encrypt.c: /tmp/ccOrOLUr.s:29: Error: bad instruction `shl rdx,6'
encrypt.c: /tmp/ccOrOLUr.s:30: Error: bad instruction `jz done_hash'
encrypt.c: /tmp/ccOrOLUr.s:31: Error: ARM register expected -- `add rdx,rdi'
encrypt.c: /tmp/ccOrOLUr.s:32: Error: ARM register expected -- `mov [rsp+0],rdx'
encrypt.c: /tmp/ccOrOLUr.s:33: Error: ARM register expected -- `mov eax,[4*0+rsi]'
encrypt.c: /tmp/ccOrOLUr.s:34: Error: ARM register expected -- `mov ebx,[4*1+rsi]'
encrypt.c: /tmp/ccOrOLUr.s:35: Error: ARM register expected -- `mov ecx,[4*2+rsi]'
encrypt.c: /tmp/ccOrOLUr.s:36: Error: ARM register expected -- `mov r8d,[4*3+rsi]'
encrypt.c: /tmp/ccOrOLUr.s:37: Error: ARM register expected -- `mov edx,[4*4+rsi]'
encrypt.c: /tmp/ccOrOLUr.s:38: Error: ARM register expected -- `mov r9d,[4*5+rsi]'
encrypt.c: /tmp/ccOrOLUr.s:39: Error: ARM register expected -- `mov r10d,[4*6+rsi]'
encrypt.c: /tmp/ccOrOLUr.s:40: Error: ARM register expected -- `mov r11d,[4*7+rsi]'
encrypt.c: /tmp/ccOrOLUr.s:41: Error: bad instruction `vmovdqa xmm13,XMMWORD PTR [PSHUFFLE_BYTE_FLIP_MASK+rip]'
encrypt.c: /tmp/ccOrOLUr.s:42: Error: bad instruction `vmovdqa xmm10,XMMWORD PTR [_SHUF_00BA+rip]'
encrypt.c: /tmp/ccOrOLUr.s:43: Error: bad instruction `vmovdqa xmm12,XMMWORD PTR [_SHUF_DC00+rip]'
encrypt.c: /tmp/ccOrOLUr.s:45: Error: bad instruction `lea rbp,XMMWORD PTR [K256+rip]'
encrypt.c: ...

Number of similar (implementation,compiler) pairs: 1, namely:
ImplementationCompiler
T:avx1gcc -march=native -mtune=native -Os -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (8.3.0)

Compiler output


encrypt.c: /tmp/cclFT0cO.s: Assembler messages:
encrypt.c: /tmp/cclFT0cO.s:17: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/cclFT0cO.s:20: Warning: alignment too large: 31 assumed
encrypt.c: /tmp/cclFT0cO.s:22: Error: expression too complex -- `push rbx'
encrypt.c: /tmp/cclFT0cO.s:23: Error: expression too complex -- `push rbp'
encrypt.c: /tmp/cclFT0cO.s:24: Error: expression too complex -- `push r13'
encrypt.c: /tmp/cclFT0cO.s:25: Error: expression too complex -- `push r14'
encrypt.c: /tmp/cclFT0cO.s:26: Error: expression too complex -- `push r15'
encrypt.c: /tmp/cclFT0cO.s:27: Error: ARM register expected -- `sub rsp,32'
encrypt.c: /tmp/cclFT0cO.s:28: Error: bad instruction `shl rdx,6'
encrypt.c: /tmp/cclFT0cO.s:29: Error: bad instruction `jz done_hash'
encrypt.c: /tmp/cclFT0cO.s:30: Error: ARM register expected -- `add rdx,rdi'
encrypt.c: /tmp/cclFT0cO.s:31: Error: ARM register expected -- `mov [rsp+0],rdx'
encrypt.c: /tmp/cclFT0cO.s:32: Error: ARM register expected -- `mov eax,[4*0+rsi]'
encrypt.c: /tmp/cclFT0cO.s:33: Error: ARM register expected -- `mov ebx,[4*1+rsi]'
encrypt.c: /tmp/cclFT0cO.s:34: Error: ARM register expected -- `mov ecx,[4*2+rsi]'
encrypt.c: /tmp/cclFT0cO.s:35: Error: ARM register expected -- `mov r8d,[4*3+rsi]'
encrypt.c: /tmp/cclFT0cO.s:36: Error: ARM register expected -- `mov edx,[4*4+rsi]'
encrypt.c: /tmp/cclFT0cO.s:37: Error: ARM register expected -- `mov r9d,[4*5+rsi]'
encrypt.c: /tmp/cclFT0cO.s:38: Error: ARM register expected -- `mov r10d,[4*6+rsi]'
encrypt.c: /tmp/cclFT0cO.s:39: Error: ARM register expected -- `mov r11d,[4*7+rsi]'
encrypt.c: /tmp/cclFT0cO.s:40: Error: bad instruction `movdqa xmm12,XMMWORD PTR [PSHUFFLE_BYTE_FLIP_MASK+rip]'
encrypt.c: /tmp/cclFT0cO.s:41: Error: bad instruction `movdqa xmm10,XMMWORD PTR [_SHUF_00BA+rip]'
encrypt.c: /tmp/cclFT0cO.s:42: Error: bad instruction `movdqa xmm11,XMMWORD PTR [_SHUF_DC00+rip]'
encrypt.c: /tmp/cclFT0cO.s:44: Error: bad instruction `lea rbp,XMMWORD PTR [K256+rip]'
encrypt.c: ...

Number of similar (implementation,compiler) pairs: 1, namely:
ImplementationCompiler
T:sse4gcc -march=native -mtune=native -O2 -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (8.3.0)

Compiler output


encrypt.c: /tmp/ccVt0rzf.s: Assembler messages:
encrypt.c: /tmp/ccVt0rzf.s:17: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/ccVt0rzf.s:20: Warning: alignment too large: 31 assumed
encrypt.c: /tmp/ccVt0rzf.s:22: Error: expression too complex -- `push rbx'
encrypt.c: /tmp/ccVt0rzf.s:23: Error: expression too complex -- `push rbp'
encrypt.c: /tmp/ccVt0rzf.s:24: Error: expression too complex -- `push r13'
encrypt.c: /tmp/ccVt0rzf.s:25: Error: expression too complex -- `push r14'
encrypt.c: /tmp/ccVt0rzf.s:26: Error: expression too complex -- `push r15'
encrypt.c: /tmp/ccVt0rzf.s:27: Error: ARM register expected -- `sub rsp,32'
encrypt.c: /tmp/ccVt0rzf.s:28: Error: bad instruction `shl rdx,6'
encrypt.c: /tmp/ccVt0rzf.s:29: Error: bad instruction `jz done_hash'
encrypt.c: /tmp/ccVt0rzf.s:30: Error: ARM register expected -- `add rdx,rdi'
encrypt.c: /tmp/ccVt0rzf.s:31: Error: ARM register expected -- `mov [rsp+0],rdx'
encrypt.c: /tmp/ccVt0rzf.s:32: Error: ARM register expected -- `mov eax,[4*0+rsi]'
encrypt.c: /tmp/ccVt0rzf.s:33: Error: ARM register expected -- `mov ebx,[4*1+rsi]'
encrypt.c: /tmp/ccVt0rzf.s:34: Error: ARM register expected -- `mov ecx,[4*2+rsi]'
encrypt.c: /tmp/ccVt0rzf.s:35: Error: ARM register expected -- `mov r8d,[4*3+rsi]'
encrypt.c: /tmp/ccVt0rzf.s:36: Error: ARM register expected -- `mov edx,[4*4+rsi]'
encrypt.c: /tmp/ccVt0rzf.s:37: Error: ARM register expected -- `mov r9d,[4*5+rsi]'
encrypt.c: /tmp/ccVt0rzf.s:38: Error: ARM register expected -- `mov r10d,[4*6+rsi]'
encrypt.c: /tmp/ccVt0rzf.s:39: Error: ARM register expected -- `mov r11d,[4*7+rsi]'
encrypt.c: /tmp/ccVt0rzf.s:40: Error: bad instruction `movdqa xmm12,XMMWORD PTR [PSHUFFLE_BYTE_FLIP_MASK+rip]'
encrypt.c: /tmp/ccVt0rzf.s:41: Error: bad instruction `movdqa xmm10,XMMWORD PTR [_SHUF_00BA+rip]'
encrypt.c: /tmp/ccVt0rzf.s:42: Error: bad instruction `movdqa xmm11,XMMWORD PTR [_SHUF_DC00+rip]'
encrypt.c: /tmp/ccVt0rzf.s:44: Error: bad instruction `lea rbp,XMMWORD PTR [K256+rip]'
encrypt.c: ...

Number of similar (implementation,compiler) pairs: 1, namely:
ImplementationCompiler
T:sse4gcc -march=native -mtune=native -O3 -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (8.3.0)

Compiler output


encrypt.c: /tmp/ccVAGx6B.s: Assembler messages:
encrypt.c: /tmp/ccVAGx6B.s:17: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/ccVAGx6B.s:20: Warning: alignment too large: 31 assumed
encrypt.c: /tmp/ccVAGx6B.s:22: Error: expression too complex -- `push rbx'
encrypt.c: /tmp/ccVAGx6B.s:23: Error: expression too complex -- `push rbp'
encrypt.c: /tmp/ccVAGx6B.s:24: Error: expression too complex -- `push r13'
encrypt.c: /tmp/ccVAGx6B.s:25: Error: expression too complex -- `push r14'
encrypt.c: /tmp/ccVAGx6B.s:26: Error: expression too complex -- `push r15'
encrypt.c: /tmp/ccVAGx6B.s:27: Error: ARM register expected -- `sub rsp,32'
encrypt.c: /tmp/ccVAGx6B.s:28: Error: bad instruction `shl rdx,6'
encrypt.c: /tmp/ccVAGx6B.s:29: Error: bad instruction `jz done_hash'
encrypt.c: /tmp/ccVAGx6B.s:30: Error: ARM register expected -- `add rdx,rdi'
encrypt.c: /tmp/ccVAGx6B.s:31: Error: ARM register expected -- `mov [rsp+0],rdx'
encrypt.c: /tmp/ccVAGx6B.s:32: Error: ARM register expected -- `mov eax,[4*0+rsi]'
encrypt.c: /tmp/ccVAGx6B.s:33: Error: ARM register expected -- `mov ebx,[4*1+rsi]'
encrypt.c: /tmp/ccVAGx6B.s:34: Error: ARM register expected -- `mov ecx,[4*2+rsi]'
encrypt.c: /tmp/ccVAGx6B.s:35: Error: ARM register expected -- `mov r8d,[4*3+rsi]'
encrypt.c: /tmp/ccVAGx6B.s:36: Error: ARM register expected -- `mov edx,[4*4+rsi]'
encrypt.c: /tmp/ccVAGx6B.s:37: Error: ARM register expected -- `mov r9d,[4*5+rsi]'
encrypt.c: /tmp/ccVAGx6B.s:38: Error: ARM register expected -- `mov r10d,[4*6+rsi]'
encrypt.c: /tmp/ccVAGx6B.s:39: Error: ARM register expected -- `mov r11d,[4*7+rsi]'
encrypt.c: /tmp/ccVAGx6B.s:40: Error: bad instruction `movdqa xmm12,XMMWORD PTR [PSHUFFLE_BYTE_FLIP_MASK+rip]'
encrypt.c: /tmp/ccVAGx6B.s:41: Error: bad instruction `movdqa xmm10,XMMWORD PTR [_SHUF_00BA+rip]'
encrypt.c: /tmp/ccVAGx6B.s:42: Error: bad instruction `movdqa xmm11,XMMWORD PTR [_SHUF_DC00+rip]'
encrypt.c: /tmp/ccVAGx6B.s:44: Error: bad instruction `lea rbp,XMMWORD PTR [K256+rip]'
encrypt.c: ...

Number of similar (implementation,compiler) pairs: 1, namely:
ImplementationCompiler
T:sse4gcc -march=native -mtune=native -O -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (8.3.0)

Compiler output


encrypt.c: /tmp/ccJMiJD5.s: Assembler messages:
encrypt.c: /tmp/ccJMiJD5.s:17: Error: unknown pseudo-op: `.intel_syntax'
encrypt.c: /tmp/ccJMiJD5.s:20: Warning: alignment too large: 31 assumed
encrypt.c: /tmp/ccJMiJD5.s:22: Error: expression too complex -- `push rbx'
encrypt.c: /tmp/ccJMiJD5.s:23: Error: expression too complex -- `push rbp'
encrypt.c: /tmp/ccJMiJD5.s:24: Error: expression too complex -- `push r13'
encrypt.c: /tmp/ccJMiJD5.s:25: Error: expression too complex -- `push r14'
encrypt.c: /tmp/ccJMiJD5.s:26: Error: expression too complex -- `push r15'
encrypt.c: /tmp/ccJMiJD5.s:27: Error: ARM register expected -- `sub rsp,32'
encrypt.c: /tmp/ccJMiJD5.s:28: Error: bad instruction `shl rdx,6'
encrypt.c: /tmp/ccJMiJD5.s:29: Error: bad instruction `jz done_hash'
encrypt.c: /tmp/ccJMiJD5.s:30: Error: ARM register expected -- `add rdx,rdi'
encrypt.c: /tmp/ccJMiJD5.s:31: Error: ARM register expected -- `mov [rsp+0],rdx'
encrypt.c: /tmp/ccJMiJD5.s:32: Error: ARM register expected -- `mov eax,[4*0+rsi]'
encrypt.c: /tmp/ccJMiJD5.s:33: Error: ARM register expected -- `mov ebx,[4*1+rsi]'
encrypt.c: /tmp/ccJMiJD5.s:34: Error: ARM register expected -- `mov ecx,[4*2+rsi]'
encrypt.c: /tmp/ccJMiJD5.s:35: Error: ARM register expected -- `mov r8d,[4*3+rsi]'
encrypt.c: /tmp/ccJMiJD5.s:36: Error: ARM register expected -- `mov edx,[4*4+rsi]'
encrypt.c: /tmp/ccJMiJD5.s:37: Error: ARM register expected -- `mov r9d,[4*5+rsi]'
encrypt.c: /tmp/ccJMiJD5.s:38: Error: ARM register expected -- `mov r10d,[4*6+rsi]'
encrypt.c: /tmp/ccJMiJD5.s:39: Error: ARM register expected -- `mov r11d,[4*7+rsi]'
encrypt.c: /tmp/ccJMiJD5.s:40: Error: bad instruction `movdqa xmm12,XMMWORD PTR [PSHUFFLE_BYTE_FLIP_MASK+rip]'
encrypt.c: /tmp/ccJMiJD5.s:41: Error: bad instruction `movdqa xmm10,XMMWORD PTR [_SHUF_00BA+rip]'
encrypt.c: /tmp/ccJMiJD5.s:42: Error: bad instruction `movdqa xmm11,XMMWORD PTR [_SHUF_DC00+rip]'
encrypt.c: /tmp/ccJMiJD5.s:44: Error: bad instruction `lea rbp,XMMWORD PTR [K256+rip]'
encrypt.c: ...

Number of similar (implementation,compiler) pairs: 1, namely:
ImplementationCompiler
T:sse4gcc -march=native -mtune=native -Os -fwrapv -fPIC -fPIE -gdwarf-4 -Wall (8.3.0)